Existing methods and apparatus of checking memory for errors may include employing a memory controller to periodically access a memory to gather statistics regarding physical memory units (PMUs), such as DRAMs or similar memory units, from which data may be output during memory accesses. If errors output from a single PMU exceed a predetermined threshold (e.g., a count), the controller may activate an interrupt so that evasive and/or corrective action may be taken. The action may prevent the errors output from the PMU from creating an uncorrectable error that may require a halt of the computer system including the memory.
Errors in data output from two or more PMUs also may be problematic even though no single PMU has an error level that exceeds its predetermined error threshold. Accordingly, methods and apparatus for checking memory for errors in such circumstances are desirable.